1. Field of the Invention
This invention relates to a plasma display panel, and more particularly to a method of driving a plasma display panel that is adaptive for generating a stable sustain discharge.
2. Description of the Related Art
Generally, a plasma display panel (PDP) radiates a phosphorous material using an ultraviolet ray with a wavelength of 147 nm generated upon discharge of an inactive mixture gas such as He+Xe, Ne+Xe or He+Ne+Xe, to thereby display a picture including characters and graphics. Such a PDP is easy to be made into a thin-film and large-dimension type. Moreover, the PDP provides a very improved picture quality owing to a recent technical development. Particularly, since a three-electrode, alternating current (AC) surface-discharge PDP has wall charges accumulated in the surface thereof upon discharge and protects electrodes from a sputtering generated by the discharge, it has advantages of a low-voltage driving and a long life.
Referring to FIG. 1, a discharge cell of the conventional three-electrode, AC surface-discharge PDP includes a scan electrode Y and a sustain electrode Z provided on an upper substrate 10, and an address electrode X provided on a lower substrate 18. The scan electrode Y and the sustain electrode Z include transparent electrodes 12Y and 12Z, and metal bus electrodes 13Y and 13Z having a smaller line width than the transparent electrodes 12Y and 12Z and provided at one edge of the transparent electrodes 12Y and 12Z, respectively.
The transparent electrodes 12Y and 12Z are usually formed from indium-tin-oxide (ITO) on the upper substrate 10. The metal bus electrodes 13Y and 13Z are usually formed from a metal such as chrome (Cr) on the transparent electrodes 12Y and 12Z to thereby reduce a voltage drop caused by the transparent electrodes 12Y and 12Z having a high resistance. On the upper substrate 10 provided with the scan electrode Y and the sustain electrode Z in parallel, an upper dielectric layer 14 and a protective film 16 are disposed. Wall charges generated upon plasma discharge are accumulated into the upper dielectric layer 14. The protective film 16 prevents a damage of the upper dielectric layer 14 caused by a sputtering during the plasma discharge and improves the emission efficiency of secondary electrons. This protective film 16 is usually made from magnesium oxide (MgO).
A lower dielectric layer 22 and barrier ribs 24 are formed on the lower substrate 18 provided with the address electrode X. The surfaces of the lower dielectric layer 22 and the barrier ribs 24 are coated with a phosphorous material layer 26. The address electrode X is formed in a direction crossing the scan electrode Y and the sustain electrode Z. The barrier rib 24 is arranged in parallel to the address electrode X to thereby prevent an ultraviolet ray and a visible light generated by a discharge from being leaked to the adjacent cells. The phosphorous material layer 26 is excited by an ultraviolet ray generated during the plasma discharge to generate any one of red, green and blue visible light rays. An inactive mixture gas is injected into a discharge space defined between the upper/lower substrates 10 and 18 and the barrier rib 24.
Such a PDP makes a time-divisional driving of one frame, which is divided into various sub-fields having a different emission frequency, so as to realize gray levels of a picture. Each sub-field is again divided into an initialization period for initializing the entire field, an address period for selecting a scan line and selecting the cell from the selected scan line and a sustain period for expressing gray levels depending on the discharge frequency.
Herein, the initialization period is again divided into a set-up interval supplied with a rising ramp waveform and a set-down interval supplied with a falling ramp waveform. For instance, when it is intended to display a picture of 256 gray levels, a frame interval equal to 1/60 second (i.e. 16.67 msec) is divided into 8 sub-fields SF1 to SF8 as shown in FIG. 2. Each of the 8 sub-field SF1 to SF8 is divided into an initialization period, an address period and a sustain period as mentioned above. Herein, the initialization period and the address period of each sub-field are equal for each sub-field, whereas the sustain period is increased at a ratio of 2n (wherein n=0, 1, 2, 3, 4, 5, 6 and 7) at each sub-field.
FIG. 3 shows a driving waveform of the PDP applied to two sub-fields.
Referring to FIG. 3, the PDP is divided into an initialization period for initializing the full field, an address period for selecting a cell, and a sustain period for sustaining a discharge of the selected cell for its driving.
In the initialization period, a rising ramp waveform Ramp-up is simultaneously applied to all the scan electrodes Y in the set-up interval. This rising ramp waveform Ramp-up causes a weak discharge within cells at the full field to generate wall charges within the cells. In the set-down interval, after the rising ramp waveform Ramp-up was supplied, a falling ramp waveform Ramp-down falling from a positive voltage lower than a peak voltage of the rising ramp waveform Ramp-up is simultaneously applied to the scan electrodes Y. The falling ramp waveform Ramp-down causes a weak erasure discharge within the cells, to thereby erase spurious charges of wall charges and space charges generated by the set-up discharge and uniformly leave wall charges required for the address discharge within the cells of the full field.
In the address period, a negative scanning pulse scan is sequentially applied to the scan electrodes Y and, at the same time, a positive data pulse data is applied to the address electrodes X. A voltage difference between the scanning pulse scan and the data pulse data is added to a wall voltage generated in the initialization period to thereby generate an address discharge within the cells supplied with the data pulse data. Wall charges are formed within the cells selected by the address discharge.
Meanwhile, a positive direct current voltage having a sustain voltage level Vs is applied to the sustain electrodes Z during the set-down interval and the address period.
In the sustain period, a sustaining pulse sus is alternately applied to the scan electrodes Y and the sustain electrodes Z. Then, a wall voltage within the cell selected by the address discharge is added to the sustain pulse sus to thereby generate a sustain discharge taking a surface-discharge type between the scan electrodes Y and the sustain electrode Z whenever each sustain pulse sus is applied. Finally, after the sustain discharge was finished, an erasing ramp waveform erase having a small pulse width is applied to the sustain electrode Z to thereby erase wall charges left within the cells.
Hereinafter, a principle of generating the wall charges and the discharge in the sustain period will be described with the aid of a voltage close curve having a hexagonal shape as shown in FIG. 4. Herein, the voltage close curve is used as a scheme for measuring a discharge generation principle and a voltage margin of the PDP.
In FIG. 4, a hexagon area at the interior of the voltage close curve is a region where wall charges at the interior of the discharge cell are distributed. A discharge is not generated at said region. Further, Y(−) represents a motion direction of wall charges when a negative voltage is applied to the scan electrode Y. Similarly, Y(+), X(+), X(−), Z(+) or Z(−) represents a motion direction of wall charges when a negative or positive voltage is applied to the scan electrode Y or the sustain electrode Z.
An operation procedure in the sustain period will be described below.
At the discharge cells where the address discharge has been generated, wall charges are located at the third quarter-face of the graph as shown in FIG. 4.
Thereafter, if a positive sustaining pulse is applied to the scan electrode Y as shown in FIG. 3, then a voltage of wall charges positioned at the third quarter-face is added to a voltage of the positive sustaining pulse, thereby moving the added voltage value via a surface-discharge area positioned at the third quarter-face of the graph (i.e., into the Y(+) axis) as shown in FIG. 5. In this case, a sustain discharge between the scan electrode Y and the sustain electrode Z is generated at the discharge cells.
After the sustain discharge was generated, the wall charges are positioned at the first quarter-face of the graph as shown in FIG. 6. Further, a voltage of wall charges positioned at the first quarter-face is added to a voltage of the positive sustaining pulse by a positive sustaining pulse applied to the sustain electrode Z, thereby moving the added voltage value via a surface-discharge area positioned at the first quarter-face (i.e., into the Z(+) axis) as shown in FIG. 6. In this case, a sustain discharge between the sustain electrode Z and the scan electrode Y is generated at the discharge cells. In real, the PDP repeats the foregoing process during the sustain period to thereby cause a predetermined frequency of sustain discharges.
However, the conventional PDP has a problem in that an opposition discharge is caused in the sustain period by an non-uniformity of the PDP cells. More specifically, the PDP has been generally manufactured into a large-dimension panel of approximately more than 42 inches. In this case, a thickness of the phosphorous material, a height of the barrier rib and the like is somewhat changed for each position thereof by a process tolerance. If the discharge cells are formed non-uniformly as mentioned above, a position (or wall voltage) of the wall charges having generated the address discharge is established differently for each discharge cell. In real, at specific discharge cells, wall charges are located at the lower side of the third quarter-face of the graph as shown in FIG. 7 after the address discharge was generated.
If wall charges at the specific discharge cell are positioned at the lower side of the third quarter-face of the graph as shown in FIG. 7, then a voltage value of the discharge cell is moved via an opposition discharge area positioned at the third quarter-face (i.e., into the Y(+) axis) as shown in FIG. 8 by a positive sustaining pulse applied to the scan electrode Y. In this case, at the discharge cells, an opposition discharge is generated between the scan electrode Y and the address electrode X. If an opposition discharge is generated between the scan electrode Y and the address electrode X, then an amount of a light generated from the discharge is reduced and the discharge is erased because the wall charges are not moved into a desired place after the opposition discharge. In other words, the conventional PDP has a problem in that a stable sustain discharge can not be generated from the specific discharge cells.
Meanwhile, there has been suggested a strategy of raising a voltage value of the data pulse data for a high-speed addressing of the PDP. However, since an operation margin of a driving voltage has been limited in the prior art, it is difficult to raise a voltage value of the data pulse data. More specifically, when a voltage value of the data pulse data is not raised, the data pulse data has a first voltage Vdata1 (i.e., approximately 60 to 80V).
If the first voltage Vdata1 is applied, then a voltage of the discharge cell is moved, from the interface portion of the surface-discharge area of the first quarter-face where the wall voltage is positioned, via an opposition discharge area of the first quarter-face (i.e., into the X(+) axis) as shown in FIG. 9. In this case, at the discharge cells, an opposition discharge is generated between the scan electrode Y and the address electrode X. Thereafter, the wall charges are moved into a place 30 being adjacent to the surface-discharge area of the third quarter-face. Herein, if the wall charges are moved into the place 30 being adjacent to the surface-discharge area of the third quarter-face, then a stable sustain discharge can be generated.
If a data pulse data having a second voltage Vdata2 (i.e., more than 80V) higher than the first voltage Vdata1 is applied for the sake of a high-speed addressing operation, then a voltage of the discharge cell is moved, from the interface portion of the surface-discharge area of the first quarter-face at which the wall charge is positioned, via the opposition discharge area of the first quarter-face (i.e., into the X(+) axis). In this case, at the discharge cells, an address discharge is generated between the scan electrode Y and the address electrode X. Herein, since the data pulse data has the second voltage Vdata2, the wall charges are moved into a place 32 being adjacent to the opposition discharge area of the third quarter-face. In other words, the prior art has a problem in that, since a probability of generating an opposition discharge in the sustain period is increased as shown in FIG. 8 when a voltage value of the data pulse data is raised for the sake of making a high-speed addressing, it is difficult to cause a stable sustain discharge.